The SambaNova Reconfigurable Dataflow Architecture™ (RDA) is a computing architecture designed to enable the next
generation of machine learning and high performance computing applications. The Reconfigurable Dataflow Architecture
is a complete, full-stack solution that incorporates innovations at all layers including algorithms, compilers, system
architecture and state-of-the-art silicon.
The RDA provides a flexible, dataflow execution model that pipelines operations, enables programmable data access
patterns and minimizes excess data movement found in fixed, core-based, instruction set architectures. It does not have a
fixed Instruction Set Architecture (ISA) like traditional architectures, but instead is programmed specifically for each model
resulting in a highly optimized, application-specific accelerator.
The Reconfigurable Dataflow Architecture is composed of the following:
SambaNova Reconfigurable Dataflow UnitTM is a next-generation processor designed to provide native dataflow processing
and programmable acceleration. It has a tiled architecture that comprises a network of reconfigurable functional units.
The architecture enables a broad set of highly parallelizable patterns contained within dataflow graphs to be efficiently
programmed as a combination of compute, memory and communication networks.
SambaFlowTM is a complete software stack designed to take input from standard machine-learning frameworks such as
PyTorch and TensorFlow. SambaFlow automatically extracts, optimizes and maps dataflow graphs onto RDUs, allowing high
performance to be obtained without the need for low-level kernel tuning. SambaFlow also provides an API for expert users
and those who are interested in leveraging the RDA for workloads beyond machine learning.
SambaNova Systems DataScaleTM is a complete, rack-level, data-center-ready accelerated computing system. Each
DataScale system configuration consists of one or more DataScale nodes, integrated networking and management
infrastructure in a standards-compliant data center rack, referred to as the SN10-8R.
Progress against the challenges outlined earlier would be limited with an approach the solely focuses on a new silicon
design or algorithm breakthrough. Through an integrated, full-stack solution, SambaNova is able to innovate across layers to
achieve a multiplying effect. Additionally, SambaNova DataScale leverages open standards and common form factors to
ease adoption and streamline deployment.
Motivations for a Dataflow Architecture
Computing applications and their associated operations require both computation and communication. In traditional
core-based architectures, the computation is programmed as required. However, the communications are managed by
the hardware and limited primarily to cache and memory transfers. This lack of ability to manage how data flows from one
intermediary calculation to the next can result in excessive data transfers and poor hardware utilization.
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